Cypress Semiconductor /psoc63 /CPUSS /SYSTICK_CTL

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Interpret as SYSTICK_CTL

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0TENMS0CLOCK_SOURCE 0 (SKEW)SKEW 0 (NOREF)NOREF

Description

SysTick timer control

Fields

TENMS

Specifies the number of clock source cycles (minus 1) that make up 10 ms. E.g., for a 32,768 Hz reference clock, TENMS is 328 - 1 = 327.

CLOCK_SOURCE

Specifies an external clock source: ‘0’: The low frequency clock ‘clk_lf’ is selected. The precision of this clock depends on whether the low frequency clock source is a SRSS internal RC oscillator (imprecise) or a device external crystal oscillator (precise). ‘1’: The internal main oscillator (IMO) clock ‘clk_imo’ is selected. The MXS40 platform uses a fixed frequency IMO clock. o ‘2’: The external crystal oscillator (ECO) clock ‘clk_eco’ is selected. ‘3’: The SRSS ‘clk_timer’ is selected (‘clk_timer’ is a divided/gated version of ‘clk_hf’ or ‘clk_imo’).

Note: If NOREF is ‘1’, the CLOCK_SOURCE value is NOT used. Note: It is SW’s responsibility to provide the correct NOREF, SKEW and TENMS field values for the selected clock source.

SKEW

Specifies the precision of the clock source and if the TENMS field represents exactly 10 ms (clock source frequency is a multiple of 100 Hz). This affects the suitability of the SysTick timer as a SW real-time clock: ‘0’: Precise. ‘1’: Imprecise.

NOREF

Specifies if an external clock source is provided: ‘0’: An external clock source is provided. ‘1’: An external clock source is NOT provided and only the CPU internal clock can be used as SysTick timer clock source.

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